This invention relates to overcurrent detector circuits for circuit-breakers for protecting power lines.
FIG. 3 is a block diagram showing a conventional overcurrent detector circuit for a circuit-breaker, which is disclosed, for example, in Japanese Laid-Open Patent (Kokai) No. 60-223418. A three-phase AC line 10 having source side terminals 11, 12, 13 and load side terminals 21, 22, 23 is provided with breaker contacts 31, 32, 33 for respective phase lines. The currents flowing through respective phases are detected by the current detectors 41, 42, 43, which may consist of current transformers.
The output of the full-wave rectifier 51 is first rectified by a full-wave rectifier 51, and the burden circuit 52 converts the the rectified output of the full-wave rectifier 51 to a corresponding voltage. A sampling timing signal generator 53 generates the sampling timing signal. An A/D converter 54 samples the output of the burden circuit 52 in synchronism with the timing signal output from the sampling timing signal generator 53 and effects an A/D conversion thereon. A count value determiner 55 calculates and determines the count value corresponding to the digital output of the A/D converter 54.
A counter 56 counts or adds up the output of the count value determiner 55. A judgment timing signal generator 57 generates the judgement timing signal. A pick-up judgment circuit 58 compares the output of the counter 56 with a predetermined threshold level in synchronism with the timing signal of the judgment timing signal generator 57, and determines an occurrence of a pick-up level when the output of the counter 56 becomes greater than the predetermined threshold level. Further, a counter 59 counts the outputs of the pick-up judgment circuit 58, and a trip judgment circuit 60 judges whether or not the count value of the counter 59 exceeds a predetermined threshold level. In response to the output of the trip judgment circuit 60, a switching device 70 generates a switching signal. Further, in response to the output of the switching device 70, a tripping device 71 breaks the breaker contacts 31 through 33. The control circuits 80 and 81 each consist of parts similar to the parts 51 through 60 described above.
Next, the operation of the circuit of FIG. 3 is described in detail. The output of the current detectors 41 is full-wave rectified by the full-wave rectifier 51, and the burden circuit 52 converts the the rectified output of the full-wave rectifier 51 to a corresponding voltage. Further, the output of the burden circuit 52, which corresponds to the phase current level detected by the current detector 41, is converted to a corresponding digital signal by the A/D converter 54 in synchronism with the sampling timing signal supplied from the sampling timing signal generator 53. On the basis of the digital output of the A/D converter 54, the count value determiner 55 determines the count value corresponding thereto in accordance with the anti-time-limiting operation characteristic of the circuit-breaker. The counter 56 adds up the count values supplied thereto from the count value determiner 55 at the sampling timings.
The pick-up judgment circuit 58 compares the output of the counter 56 with a predetermined threshold level in synchronism with the judgement timing signal supplied from the judgment timing signal generator 57, and determines an occurrence of a pick-up level when the output of the counter 56 exceeds the predetermined threshold level. The counter 59 counts (adds up) the outputs of the pick-up judgment circuit 58 supplied thereto in synchronism with the judgement timing signal of the judgment timing signal generator 57. When the output of the counter 59 exceeds a predetermined threshold level, the trip judgment circuit 60 outputs a tripping signal. In response to the output of the trip judgment circuit 60 (or similar signals output from the corresponding parts within the control circuits 80 and 81), the switching device 70 activates the tripping device 71 to break the breaker contacts 31 through 33 of the three-phase AC line 10.
The above conventional circuit-breaker, however, has the following disadvantage. If the sampling interval for the pick-up judgement is set at a relatively long period of 100 milliseconds, for example, for the purpose of ensuring stable tripping operation, it becomes impossible to realize a short delay time operation. Namely, the tripping requires 100 milliseconds at the shortest, and the delay time can only be controlled in units of 100 milliseconds.